8d(C,ti,omap5-uevmti,omap5&7TI OMAP5 uEVM boardchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000 /connector@0memorymemorycpuscpu@0cpuarm,cortex-a15 mB@,`cpucpu@1cpuarm,cortex-a15thermal-zonescpu_thermal4Btripscpu_alertR^passivecpu_critRH^ criticalcooling-mapsmap0i ngpu_thermal4Btripsgpu_critRH^ criticalcore_thermal4Btripscore_critRH^ criticaltimerarm,armv7-timer0}   pmuarm,cortex-a15-pmu}interrupt-controller@48211000arm,cortex-a15-gic H!H! H!@ H!` socti,omap-inframpu ti,omap5-mpumpuocpti,omap4-l3-nocsimple-busl3_main_1l3_main_2l3_main_3D D0E@}  prm@4ae06000 ti,omap5-prmJ`0clockssys_clkin ti,mux-clock abe_dpll_bypass_clk_mux ti,mux-clockabe_dpll_clk_mux ti,mux-clock custefuse_sys_gfclk_divfixed-factor-clockdss_syc_gfclk_divfixed-factor-clock((wkupaon_iclk_mux ti,mux-clockl3instr_ts_gclk_divfixed-factor-clockgpio1_dbclkti,gate-clock8timer1_gfclk_mux ti,mux-clock@clockdomainscm_core_aon@4a004000ti,omap5-cm-core-aonJ@ clockspad_clks_src_ck fixed-clockpad_clks_ckti,gate-clock++secure_32k_clk_src_ck fixed-clockslimbus_src_clk fixed-clockslimbus_clkti,gate-clock %%sys_32k_ck fixed-clockvirt_12000000_ck fixed-clockvirt_13000000_ck fixed-clock]@virt_16800000_ck fixed-clockY  virt_19200000_ck fixed-clock$  virt_26000000_ck fixed-clock  virt_27000000_ck fixed-clock  virt_38400000_ck fixed-clockI  xclk60mhsp1_ck fixed-clockWWxclk60mhsp2_ck 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!!dpll_iva_x2_ckti,omap4-dpll-x2-clock!""dpll_iva_h11x2_ckti,divider-clock"?dpll_iva_h12x2_ckti,divider-clock"?mpu_dpll_hs_clk_divfixed-factor-clock##dpll_mpu_ckti,omap5-mpu-dpll-clock#`dlhdpll_mpu_m2_ckti,divider-clockpper_dpll_hs_clk_divfixed-factor-clockFFusb_dpll_hs_clk_divfixed-factor-clockKKl3_iclk_divfixed-factor-clock$$gpu_l3_iclkfixed-factor-clock$l4_root_clk_divfixed-factor-clock$slimbus1_slimbus_clkti,gate-clock% `aess_fclkti,divider-clock&(dmic_sync_mux_ck ti,mux-clock '()8**dmic_gfclk ti,mux-clock *+%8mcasp_sync_mux_ck ti,mux-clock '()@,,mcasp_gfclk ti,mux-clock ,+%@mcbsp1_sync_mux_ck ti,mux-clock '()H--mcbsp1_gfclk ti,mux-clock -+%Hmcbsp2_sync_mux_ck ti,mux-clock '()P..mcbsp2_gfclk ti,mux-clock .+%Pmcbsp3_sync_mux_ck ti,mux-clock '()X//mcbsp3_gfclk ti,mux-clock /+%Xtimer5_gfclk_mux ti,mux-clock(htimer6_gfclk_mux ti,mux-clock(ptimer7_gfclk_mux ti,mux-clock(xtimer8_gfclk_mux ti,mux-clock(dummy_ck fixed-clockclockdomainsscrm@4ae0a000ti,omap5-scrmJ clocksauxclk0_src_gate_ck ti,composite-no-wait-gate-clock022auxclk0_src_mux_ckti,composite-mux-clock 0133auxclk0_src_ckti,composite-clock2344auxclk0_ckti,divider-clock4AAauxclk1_src_gate_ck ti,composite-no-wait-gate-clock055auxclk1_src_mux_ckti,composite-mux-clock 0166auxclk1_src_ckti,composite-clock5677auxclk1_ckti,divider-clock7BBauxclk2_src_gate_ck ti,composite-no-wait-gate-clock088auxclk2_src_mux_ckti,composite-mux-clock 0199auxclk2_src_ckti,composite-clock89::auxclk2_ckti,divider-clock:CCauxclk3_src_gate_ck ti,composite-no-wait-gate-clock0;;auxclk3_src_mux_ckti,composite-mux-clock 01<<auxclk3_src_ckti,composite-clock;<==auxclk3_ckti,divider-clock=DDauxclk4_src_gate_ck ti,composite-no-wait-gate-clock0 >>auxclk4_src_mux_ckti,composite-mux-clock 01 ??auxclk4_src_ckti,composite-clock>?@@auxclk4_ckti,divider-clock@ EEauxclkreq0_ck ti,mux-clockABCDEauxclkreq1_ck ti,mux-clockABCDEauxclkreq2_ck ti,mux-clockABCDEauxclkreq3_ck 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Bdss_sys_clkti,gate-clock(  gpio2_dbclkti,gate-clock`gpio3_dbclkti,gate-clockhgpio4_dbclkti,gate-clockpgpio5_dbclkti,gate-clockxgpio6_dbclkti,gate-clockgpio7_dbclkti,gate-clockgpio8_dbclkti,gate-clockiss_ctrlclkti,gate-clockS lli_txphy_clkti,gate-clockT lli_txphy_ls_clkti,gate-clockU  mmc1_32khz_clkti,gate-clock(sata_ref_clkti,gate-clockusb_host_hs_hsic480m_p1_clkti,gate-clockP Xusb_host_hs_hsic480m_p2_clkti,gate-clockPXusb_host_hs_hsic480m_p3_clkti,gate-clockPXusb_host_hs_hsic60m_p1_clkti,gate-clockV Xusb_host_hs_hsic60m_p2_clkti,gate-clockV Xusb_host_hs_hsic60m_p3_clkti,gate-clockVXutmi_p1_gfclk ti,mux-clockVWXXXusb_host_hs_utmi_p1_clkti,gate-clockXXutmi_p2_gfclk ti,mux-clockVYXZZusb_host_hs_utmi_p2_clkti,gate-clockZ Xusb_host_hs_utmi_p3_clkti,gate-clockV Xusb_otg_ss_refclk960mti,gate-clock[||usb_phy_cm_clk32kti,gate-clock@{{usb_tll_hs_usb_ch0_clkti,gate-clockVhusb_tll_hs_usb_ch1_clkti,gate-clockV husb_tll_hs_usb_ch2_clkti,gate-clockV hfdif_fclkti,divider-clockM(gpu_core_gclk_mux ti,mux-clock\] gpu_hyd_gclk_mux ti,mux-clock\] hsi_fclkti,divider-clockN8mmc1_fclk_mux ti,mux-clock^N(__mmc1_fclkti,divider-clock_(mmc2_fclk_mux ti,mux-clock^N0``mmc2_fclkti,divider-clock`0timer10_gfclk_mux ti,mux-clock(timer11_gfclk_mux ti,mux-clock0timer2_gfclk_mux ti,mux-clock8timer3_gfclk_mux ti,mux-clock@timer4_gfclk_mux ti,mux-clockHtimer9_gfclk_mux ti,mux-clockPclockdomainsl3init_clkdmti,clockdomainLcounter@4ae04000ti,omap-counter32kJ@@ counter_32kpinmux@4a002840 ti,omap4-padconfpinctrl-singleJ(@Usdefaultabcdefpinmux_twl6040_pins~aapinmux_mcpdm_pins(B\^`bbbpinmux_mcbsp1_pins LN PR ccpinmux_mcbsp2_pins TVXZddpinmux_i2c1_pinsiipinmux_i2c5_pinskkpinmux_mcspi2_pins mmpinmux_mcspi3_pins xz|~nnpinmux_mcspi4_pins dhjloopinmux_usbhost_pins0pneepinmux_led_gpio_pinsffpinmux_uart1_pins `bdfpppinmux_uart3_pinsqqpinmux_uart5_pins prtvrrpinmux_dss_hdmi_pinspinmux_tpd12s015_pinspinmux@4ae0c840 ti,omap4-padconfpinctrl-singleJ@8Usdefaultgpinmux_usbhost_wkup_pinsggtisyscon@4a002da0sysconJ-hhpbias_regulatorti,pbias-omap`hpbias_mmc_omap5pbias_mmc_omap5w@-ssdma-controller@4a056000ti,omap4430-sdmaJ`0}   llgpio@4ae10000ti,omap4-gpioJ }gpio1);Kgpio@48055000ti,omap4-gpioHP }gpio2;Kgpio@48057000ti,omap4-gpioHp }gpio3;Kgpio@48059000ti,omap4-gpioH } gpio4;Kgpio@4805b000ti,omap4-gpioH }!gpio5;Kgpio@4805d000ti,omap4-gpioH }"gpio6;Kgpio@48051000ti,omap4-gpioH }#gpio7;Kgpio@48053000ti,omap4-gpioH0 }ygpio8;Kgpmc@50000000ti,omap4430-gpmcP }Wcgpmc$fcki2c@48070000 ti,omap4-i2cH }8i2c1defaultipalmas@48 ti,palmas }&Hujjpalmas_usbti,palmas-usb-vidvvpalmas_pmicti,palmas-pmic&j} short-irqregulatorssmps123smps123 '`smps45smps45 '0smps6smps6OOsmps7smps7w@w@smps8smps8 '0smps9smps9  smps10_out2 smps10_out2LK@LK@smps10_out1 smps10_out1LK@LK@wwldo1ldo1`w@ldo2ldo2** disabledldo3ldo3`` disabledldo4ldo4`w@ldo5ldo5w@w@ldo6ldo6OOldo7ldo7 disabledldo8ldo8-- disabledldo9ldo9w@-ttldolnldolnw@w@ldousbldousb1P1Pregen3regen3i2c@48072000 ti,omap4-i2cH  }9i2c2i2c@48060000 ti,omap4-i2cH }=i2c3i2c@4807a000 ti,omap4-i2cH }>i2c4i2c@4807c000 ti,omap4-i2cH }<i2c5defaultkgpio@22 ti,tca6424";Kspinlock@4a0f6000ti,omap4-hwspinlockJ` spinlock%spi@48098000ti,omap4-mcspiH  }Amcspi13@Al#l$l%l&l'l(l)l* Ftx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap4-mcspiH  }Bmcspi23 Al+l,l-l.Ftx0rx0tx1rx1defaultmspi@480b8000ti,omap4-mcspiH  }[mcspi33AllFtx0rx0defaultnspi@480ba000ti,omap4-mcspiH  }0mcspi43AlFlGFtx0rx0defaultoserial@4806a000ti,omap4-uartH }Huart1ldefaultpserial@4806c000ti,omap4-uartH }Iuart2lserial@48020000ti,omap4-uartH }Juart3ldefaultqserial@4806e000ti,omap4-uartH }Fuart4lserial@48066000ti,omap4-uartH` }iuart5ldefaultrserial@48068000ti,omap4-uartH }juart6lmmc@4809c000ti,omap4-hsmmcH  }Smmc1P]Al=l>Ftxrxtstmmc@480b4000ti,omap4-hsmmcH @ }Vmmc2]Al/l0Ftxrxummc@480ad000ti,omap4-hsmmcH  }^mmc3]AlMlNFtxrxmmc@480d1000ti,omap4-hsmmcH  }`mmc4]Al9l:Ftxrx disabledmmc@480d5000ti,omap4-hsmmcH P };mmc5]Al;l<Ftxrx disabledmmu@4a066000ti,omap4-iommuJ` }mmu_dspmmu@55082000ti,omap4-iommuU  }dmmu_ipukeypad@4ae1c000ti,omap4-keypadJkbdmcpdm@40132000ti,omap4-mcpdm@ I mpudma }pmcpdmAlAlBFup_linkdn_link disableddmic@4012e000ti,omap4-dmic@Impudma }rdmicAlCFup_link disabledmcbsp@40122000ti,omap4-mcbsp@ I mpudma }commonmcbsp1Al!l"Ftxrx disabledmcbsp@40124000ti,omap4-mcbsp@@I@mpudma }commonmcbsp2AllFtxrx disabledmcbsp@40126000ti,omap4-mcbsp@`I`mpudma }commonmcbsp3AllFtxrx disabledmailbox@4a0f4000ti,omap4-mailboxJ@ }mailboxtimer@4ae18000ti,omap5430-timerJ }%timer1timer@48032000ti,omap5430-timerH  }&timer2timer@48034000ti,omap5430-timerH@ }'timer3timer@48036000ti,omap5430-timerH` }(timer4timer@40138000ti,omap5430-timer@I })timer5timer@4013a000ti,omap5430-timer@I }*timer6timer@4013c000ti,omap5430-timer@I }+timer7timer@4013e000ti,omap5430-timer@I },timer8timer@4803e000ti,omap5430-timerH }-timer9timer@48086000ti,omap5430-timerH` }.timer10timer@48088000ti,omap5430-timerH }/timer11wdt@4ae14000ti,omap5-wdtti,omap3-wdtJ@ }P wd_timer2dmm@4e000000 ti,omap5-dmmN }qdmmemif@4c000000 ti,emif-4d5emif1#L }n,CXemif@4d000000 ti,emif-4d5emif2#M }o,CXcontrol-phy@4a002300ti,control-phy-usb2J#powerzzcontrol-phy@4a002370ti,control-phy-pipe3J#ppower}}omap_dwc3@4a020000ti,dwc3 usb_otg_ssJ }]kuv|wdwc3@4a030000 snps,dwc3J }\xyusb2-phyusb3-phy peripheralocp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1usb2phy@4a084000 ti,omap-usb2J@|z{|wkupclkrefclkxxusb3phy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrl} {|wkupclksysclkrefclkyyusbhstll@4a062000 ti,usbhs-tllJ  }N usb_tll_hsusbhshost@4a064000ti,usbhs-hostJ@ usb_host_hs VWY3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-hsic ehci-hsicohci@4a064800ti,ohci-omap3JH& }Lehci@4a064c00 ti,ehci-omapJL& }M ~bandgap@4a0021e0 J! J#, J#,J#< }~ti,omap5430-bandgapcontrol-phy@4a002374ti,control-phy-pipe3J#tpowersysclkocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4a096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrlsysclksata@4a141100snps,dwc-ahciJJ }6 sata-physatadss@58000000 ti,omap5-dssXok dss_corefckdispc@58001000ti,omap5-dispcX } dss_dispcfckencoder@58004000 ti,omap5-dsiX@XB@XC@protophypll }5 disabled dss_dsi1 fcksys_clkencoder@58005000 ti,omap5-dsiXX@X@protophypll }7 disabled dss_dsi2 fcksys_clkencoder@58060000ti,omap5-hdmi XXXXwppllphycore }eok dss_hdmi fcksys_clkAlL Faudio_txdefaultportendpointfixedregulator-mmcsdregulator-fixed vmmcsd_fixed--uuhsusb2_phyusb-nop-xceiv  B main_clk$~~hsusb3_phyusb-nop-xceiv  leds gpio-ledsled@1omap5:blue:usr1  heartbeat5offencoder@0 ti,tpd12s015default$portsport@0endpoint@0port@1endpoint@0connector@0hdmi-connectorhdmibportendpoint #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5display0device_typeregoperating-pointsclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplylinux,phandlepolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellsti,hwmodsranges#clock-cellsti,index-starts-at-oneclock-multclock-divti,bit-shiftclock-frequencyti,max-divti,index-power-of-twoti,dividersti,set-rate-parentpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#dma-cells#dma-channels#dma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpmc,num-csgpmc,num-waitpinsti,system-power-controllerti,enable-vbus-detectionti,enable-id-detectionti,wakeupinterrupt-nameti,ldo6-vibratorregulator-always-onregulator-boot-onti,smps-rangestatus#hwlock-cellsti,spi-num-csdmasdma-namesti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removableti,iommu-bus-err-backreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,no-idle-on-initphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertutmi-modeextconvbus-supplyphysphy-namesdr_modetx-fifo-resizectrl-module#phy-cellsport2-modeport3-mode#thermal-sensor-cellsvdda-supplyremote-endpointreset-gpioslabellinux,default-triggerdefault-state