+8È(Pti,omap5-uevmti,omap5&7TI OMAP5 uEVM boardchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000 /connector@0memorymemorycpuscpu@0cpuarm,cortex-a15B@,`cpucpu@1cpuarm,cortex-a15thermal-zonescpu_thermal4Btripscpu_alertR^passivecpu_critRH^ criticalcooling-mapsmap0i ngpu_thermal4Btripsgpu_critRH^ criticalcore_thermal4Btripscore_critRH^ criticaltimerarm,armv7-timer0}   &pmuarm,cortex-a15-pmu}interrupt-controller@48211000arm,cortex-a15-gic H!H! H!@ H!` &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&socti,omap-inframpu ti,omap4-mpumpuocpti,omap5-l3-nocsimple-busl3_main_1l3_main_2l3_main_3D D0E@}  l4@4a000000ti,omap5-l4-cfgsimple-bus J"scm@2000ti,omap5-scm-coresimple-bus   scm_conf@0sysconscm@2800%ti,omap5-scm-padconf-coresimple-bus (pinmux@40 ti,omap5-padconfpinctrl-single@default yypinmux_twl6040_pins~mmpinmux_mcpdm_pins(B\^`b~~pinmux_mcbsp1_pins LN PR pinmux_mcbsp2_pins TVXZpinmux_i2c1_pinskkpinmux_i2c5_pinsrrpinmux_mcspi2_pins ttpinmux_mcspi3_pins xz|~uupinmux_mcspi4_pins dhjlvvpinmux_usbhost_pins0pn  pinmux_led_gpio_pins  pinmux_uart1_pins `bdfwwpinmux_uart3_pinsxxpinmux_uart5_pins prtvzzpinmux_dss_hdmi_pinspinmux_tpd12s015_pinsomap5_padconf_global@5a0sysconsimple-bus   pbias_regulatorti,pbias-omap5ti,pbias-omap`+ pbias_mmc_omap52pbias_mmc_omap5Aw@Y-{{cm_core_aon@4000ti,omap5-cm-core-aon@ clockspad_clks_src_ckq fixed-clock~  pad_clks_ckqti,gate-clock ((secure_32k_clk_src_ckq fixed-clock~slimbus_src_clkq fixed-clock~  slimbus_clkqti,gate-clock  ""sys_32k_ckq fixed-clock~--virt_12000000_ckq fixed-clock~KKvirt_13000000_ckq fixed-clock~]@LLvirt_16800000_ckq fixed-clock~YMMvirt_19200000_ckq fixed-clock~$NNvirt_26000000_ckq fixed-clock~OOvirt_27000000_ckq fixed-clock~PPvirt_38400000_ckq fixed-clock~IQQxclk60mhsp1_ckq fixed-clock~AAxclk60mhsp2_ckq fixed-clock~CCdpll_abe_ckqti,omap4-dpll-m4xen-clockdpll_abe_x2_ckqti,omap4-dpll-x2-clockdpll_abe_m2x2_ckqti,divider-clockabe_24m_fclkqfixed-factor-clock$$abe_clkqti,divider-clock##abe_iclkqti,divider-clock(abe_lp_clk_divqfixed-factor-clockRRdpll_abe_m3x2_ckqti,divider-clockdpll_core_byp_muxq ti,mux-clock,dpll_core_ckqti,omap4-dpll-core-clock $,(dpll_core_x2_ckqti,omap4-dpll-x2-clockdpll_core_h21x2_ckqti,divider-clock?Pc2c_fclkqfixed-factor-clockc2c_iclkqfixed-factor-clockdpll_core_h11x2_ckqti,divider-clock?8dpll_core_h12x2_ckqti,divider-clock?<dpll_core_h13x2_ckqti,divider-clock?@dpll_core_h14x2_ckqti,divider-clock?DFFdpll_core_h22x2_ckqti,divider-clock?Tdpll_core_h23x2_ckqti,divider-clock?Xdpll_core_h24x2_ckqti,divider-clock?\dpll_core_m2_ckqti,divider-clock0dpll_core_m3x2_ckqti,divider-clock4TTiva_dpll_hs_clk_divqfixed-factor-clockdpll_iva_byp_muxq ti,mux-clockdpll_iva_ckqti,omap4-dpll-clockdpll_iva_x2_ckqti,omap4-dpll-x2-clockdpll_iva_h11x2_ckqti,divider-clock?dpll_iva_h12x2_ckqti,divider-clock?mpu_dpll_hs_clk_divqfixed-factor-clock  dpll_mpu_ckqti,omap5-mpu-dpll-clock `dlhdpll_mpu_m2_ckqti,divider-clockpper_dpll_hs_clk_divqfixed-factor-clock..usb_dpll_hs_clk_divqfixed-factor-clock44l3_iclk_divqti,divider-clock!!gpu_l3_iclkqfixed-factor-clock!l4_root_clk_divqti,divider-clock!slimbus1_slimbus_clkqti,gate-clock" `aess_fclkqti,divider-clock#(dmic_sync_mux_ckq ti,mux-clock $%&8''dmic_gfclkq ti,mux-clock '("8mcasp_sync_mux_ckq ti,mux-clock $%&@))mcasp_gfclkq ti,mux-clock )("@mcbsp1_sync_mux_ckq ti,mux-clock $%&H**mcbsp1_gfclkq ti,mux-clock *("Hmcbsp2_sync_mux_ckq ti,mux-clock $%&P++mcbsp2_gfclkq ti,mux-clock +("Pmcbsp3_sync_mux_ckq ti,mux-clock $%&X,,mcbsp3_gfclkq ti,mux-clock ,("Xtimer5_gfclk_muxq ti,mux-clock%-htimer6_gfclk_muxq ti,mux-clock%-ptimer7_gfclk_muxq ti,mux-clock%-xtimer8_gfclk_muxq ti,mux-clock%-dummy_ckq fixed-clock~clockdomainscm_core@8000ti,omap5-cm-core0clocksdpll_per_byp_muxq ti,mux-clock.L//dpll_per_ckqti,omap4-dpll-clock/@DLH00dpll_per_x2_ckqti,omap4-dpll-x2-clock011dpll_per_h11x2_ckqti,divider-clock1?X77dpll_per_h12x2_ckqti,divider-clock1?\<<dpll_per_h14x2_ckqti,divider-clock1?dGGdpll_per_m2_ckqti,divider-clock0P99dpll_per_m2x2_ckqti,divider-clock1P88dpll_per_m3x2_ckqti,divider-clock1TUUdpll_unipro1_ckqti,omap4-dpll-clock 22dpll_unipro1_clkdcoldoqfixed-factor-clock2>>dpll_unipro1_m2_ckqti,divider-clock2??dpll_unipro2_ckqti,omap4-dpll-clock33dpll_unipro2_clkdcoldoqfixed-factor-clock3dpll_unipro2_m2_ckqti,divider-clock3dpll_usb_byp_muxq ti,mux-clock455dpll_usb_ckqti,omap4-dpll-j-type-clock566dpll_usb_clkdcoldoqfixed-factor-clock6EEdpll_usb_m2_ckqti,divider-clock6::func_128m_clkqfixed-factor-clock7HHfunc_12m_fclkqfixed-factor-clock8func_24m_clkqfixed-factor-clock9&&func_48m_fclkqfixed-factor-clock8;;func_96m_fclkqfixed-factor-clock8==l3init_60m_fclkqti,divider-clock:@@dss_32khz_clkqti,gate-clock-  dss_48mhz_clkqti,gate-clock;  dss_dss_clkqti,gate-clock< dss_sys_clkqti,gate-clock%  gpio2_dbclkqti,gate-clock-`gpio3_dbclkqti,gate-clock-hgpio4_dbclkqti,gate-clock-pgpio5_dbclkqti,gate-clock-xgpio6_dbclkqti,gate-clock-gpio7_dbclkqti,gate-clock-gpio8_dbclkqti,gate-clock-iss_ctrlclkqti,gate-clock= lli_txphy_clkqti,gate-clock> lli_txphy_ls_clkqti,gate-clock?  mmc1_32khz_clkqti,gate-clock-(sata_ref_clkqti,gate-clockusb_host_hs_hsic480m_p1_clkqti,gate-clock: Xusb_host_hs_hsic480m_p2_clkqti,gate-clock:Xusb_host_hs_hsic480m_p3_clkqti,gate-clock:Xusb_host_hs_hsic60m_p1_clkqti,gate-clock@ Xusb_host_hs_hsic60m_p2_clkqti,gate-clock@ Xusb_host_hs_hsic60m_p3_clkqti,gate-clock@Xutmi_p1_gfclkq ti,mux-clock@AXBBusb_host_hs_utmi_p1_clkqti,gate-clockBXutmi_p2_gfclkq ti,mux-clock@CXDDusb_host_hs_utmi_p2_clkqti,gate-clockD Xusb_host_hs_utmi_p3_clkqti,gate-clock@ Xusb_otg_ss_refclk960mqti,gate-clockEusb_phy_cm_clk32kqti,gate-clock-@usb_tll_hs_usb_ch0_clkqti,gate-clock@husb_tll_hs_usb_ch1_clkqti,gate-clock@ husb_tll_hs_usb_ch2_clkqti,gate-clock@ hfdif_fclkqti,divider-clock7(gpu_core_gclk_muxq ti,mux-clockFG gpu_hyd_gclk_muxq ti,mux-clockFG hsi_fclkqti,divider-clock88mmc1_fclk_muxq ti,mux-clockH8(IImmc1_fclkqti,divider-clockI(mmc2_fclk_muxq ti,mux-clockH80JJmmc2_fclkqti,divider-clockJ0timer10_gfclk_muxq ti,mux-clock-(timer11_gfclk_muxq ti,mux-clock-0timer2_gfclk_muxq ti,mux-clock-8timer3_gfclk_muxq ti,mux-clock-@timer4_gfclk_muxq ti,mux-clock-Htimer9_gfclk_muxq ti,mux-clock-Pclockdomainsl3init_clkdmti,clockdomain6l4@4ae00000ti,omap5-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,omap5-prm`0 } clockssys_clkinq ti,mux-clockKLMNOPQabe_dpll_bypass_clk_muxq ti,mux-clock-abe_dpll_clk_muxq ti,mux-clock- custefuse_sys_gfclk_divqfixed-factor-clockdss_syc_gfclk_divqfixed-factor-clock%%wkupaon_iclk_muxq ti,mux-clockRSSl3instr_ts_gclk_divqfixed-factor-clockSgpio1_dbclkqti,gate-clock-8timer1_gfclk_muxq ti,mux-clock-@clockdomainsscrm@a000ti,omap5-scrm clocksauxclk0_src_gate_ckq ti,composite-no-wait-gate-clockTVVauxclk0_src_mux_ckqti,composite-mux-clock TUWWauxclk0_src_ckqti,composite-clockVWXXauxclk0_ckqti,divider-clockXeeauxclk1_src_gate_ckq ti,composite-no-wait-gate-clockTYYauxclk1_src_mux_ckqti,composite-mux-clock TUZZauxclk1_src_ckqti,composite-clockYZ[[auxclk1_ckqti,divider-clock[ffauxclk2_src_gate_ckq ti,composite-no-wait-gate-clockT\\auxclk2_src_mux_ckqti,composite-mux-clock TU]]auxclk2_src_ckqti,composite-clock\]^^auxclk2_ckqti,divider-clock^ggauxclk3_src_gate_ckq ti,composite-no-wait-gate-clockT__auxclk3_src_mux_ckqti,composite-mux-clock TU``auxclk3_src_ckqti,composite-clock_`aaauxclk3_ckqti,divider-clockahhauxclk4_src_gate_ckq ti,composite-no-wait-gate-clockT bbauxclk4_src_mux_ckqti,composite-mux-clock TU ccauxclk4_src_ckqti,composite-clockbcddauxclk4_ckqti,divider-clockd iiauxclkreq0_ckq ti,mux-clockefghiauxclkreq1_ckq ti,mux-clockefghiauxclkreq2_ckq ti,mux-clockefghiauxclkreq3_ckq ti,mux-clockefghiclockdomainspinmux@c840 ti,omap5-padconfpinctrl-single@8default jpinmux_usbhost_wkup_pinsjjocmcram@40300000 mmio-sram@0dma-controller@4a056000ti,omap4430-sdmaJ`0}   ssgpio@4ae10000ti,omap4-gpioJ }gpio1,>Ngpio@48055000ti,omap4-gpioHP }gpio2>Ngpio@48057000ti,omap4-gpioHp }gpio3>Ngpio@48059000ti,omap4-gpioH } gpio4>Ngpio@4805b000ti,omap4-gpioH }!gpio5>Nnngpio@4805d000ti,omap4-gpioH }"gpio6>Ngpio@48051000ti,omap4-gpioH }#gpio7>Ngpio@48053000ti,omap4-gpioH0 }ygpio8>Ngpmc@50000000ti,omap4430-gpmcP }Zfgpmc!fcki2c@48070000 ti,omap4-i2cH }8i2c1default k~palmas@48 ti,palmas }Hxllpalmas_usbti,palmas-usb-vidpalmas_clk32k@1ti,palmas-clk32kgaudioqqqpalmas_pmicti,palmas-pmic&l} short-irqregulatorssmps1232smps123A 'Y`smps452smps45A 'Y0smps62smps6AOYOsmps72smps7Aw@Yw@oosmps82smps8A 'Y0smps92smps9A Y ppsmps10_out2 2smps10_out2ALK@YLK@smps10_out1 2smps10_out1ALK@YLK@ldo12ldo1A`Yw@ldo22ldo2A*Y* !disabledldo32ldo3A`Y` !disabledldo42ldo4A`Yw@ldo52ldo5Aw@Yw@ldo62ldo6AOYOldo72ldo7AY !disabledldo82ldo8A-Y- !disabledldo92ldo9Aw@Y-||ldoln2ldolnAw@Yw@ldousb2ldousbA1PY1Pregen32regen3palmas_power_buttonti,palmas-pwrbutton&l}(twl@4b ti,twl6040Kdefault m }w 6n GoRp^qclk32ki2c@48072000 ti,omap4-i2cH  }9i2c2i2c@48060000 ti,omap4-i2cH }=i2c3i2c@4807a000 ti,omap4-i2cH }>i2c4i2c@4807c000 ti,omap4-i2cH }<i2c5default r~gpio@22 ti,tca6424">Nspinlock@4a0f6000ti,omap4-hwspinlockJ` spinlockqspi@48098000ti,omap4-mcspiH  }Amcspi1@s#s$s%s&s's(s)s* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap4-mcspiH  }Bmcspi2 s+s,s-s.tx0rx0tx1rx1default tspi@480b8000ti,omap4-mcspiH  }[mcspi3sstx0rx0default uspi@480ba000ti,omap4-mcspiH  }0mcspi4sFsGtx0rx0default vserial@4806a000ti,omap4-uartH }Huart1~ldefault wserial@4806c000ti,omap4-uartH }Iuart2~lserial@48020000ti,omap4-uartH }Juart3~ldefault xJyserial@4806e000ti,omap4-uartH }Fuart4~lserial@48066000ti,omap4-uartH` }iuart5~ldefault zserial@48068000ti,omap4-uartH }juart6~lmmc@4809c000ti,omap4-hsmmcH  }Smmc1s=s>txrx{|mmc@480b4000ti,omap4-hsmmcH @ }Vmmc2s/s0txrx}mmc@480ad000ti,omap4-hsmmcH  }^mmc3sMsNtxrxmmc@480d1000ti,omap4-hsmmcH  }`mmc4s9s:txrx !disabledmmc@480d5000ti,omap4-hsmmcH P };mmc5s;s<txrx !disabledmmu@4a066000ti,omap4-iommuJ` }mmu_dspmmu@55082000ti,omap4-iommuU  }dmmu_ipukeypad@4ae1c000ti,omap4-keypadJkbdmcpdm@40132000ti,omap4-mcpdm@ I +mpudma }pmcpdmsAsBup_linkdn_link!okaydefault ~dmic@4012e000ti,omap4-dmic@I+mpudma }rdmicsCup_link !disabledmcbsp@40122000ti,omap4-mcbsp@ I +mpudma }5commonEmcbsp1s!s"txrx!okaydefault mcbsp@40124000ti,omap4-mcbsp@@I@+mpudma }5commonEmcbsp2sstxrx!okaydefault mcbsp@40126000ti,omap4-mcbsp@`I`+mpudma }5commonEmcbsp3sstxrx !disabledmailbox@4a0f4000ti,omap4-mailboxJ@ }mailboxT`rmbox_ipu  mbox_dsp  timer@4ae18000ti,omap5430-timerJ }%timer1timer@48032000ti,omap5430-timerH  }&timer2timer@48034000ti,omap5430-timerH@ }'timer3timer@48036000ti,omap5430-timerH` }(timer4timer@40138000ti,omap5430-timer@I })timer5timer@4013a000ti,omap5430-timer@I }*timer6timer@4013c000ti,omap5430-timer@I }+timer7timer@4013e000ti,omap5430-timer@I },timer8timer@4803e000ti,omap5430-timerH }-timer9timer@48086000ti,omap5430-timerH` }.timer10timer@48088000ti,omap5430-timerH }/timer11wdt@4ae14000ti,omap5-wdtti,omap3-wdtJ@ }P wd_timer2dmm@4e000000 ti,omap5-dmmN }qdmmemif@4c000000 ti,emif-4d5emif1L }n emif@4d000000 ti,emif-4d5emif2M }o control-phy@4a002300ti,control-phy-usb2J#+powercontrol-phy@4a002370ti,control-phy-pipe3J#p+poweromap_dwc3@4a020000ti,dwc3 usb_otg_ssJ }](/dwc3@4a030000 snps,dwc3J$}\\]5peripheralhostotg;@usb2-phyusb3-phy JperipheralRocp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1usb2phy@4a084000 ti,omap-usb2J@|awkupclkrefclkmusb3phy@4a084400 ti,omap-usb3JDJHdJL@+phy_rxphy_txpll_ctrla wkupclksysclkrefclkmusbhstll@4a062000 ti,usbhs-tllJ  }N usb_tll_hsusbhshost@4a064000ti,usbhs-hostJ@ usb_host_hs @AC3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 xehci-hsic ehci-hsicohci@4a064800ti,ohci-omap3JH }Lehci@4a064c00 ti,ehci-omapJL }M ;bandgap@4a0021e0 J! J#, J#,J#< }~ti,omap5430-bandgapcontrol-phy@4a002374ti,control-phy-pipe3J#t+powersysclkocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4a096000ti,phy-pipe3-sataJ `J ddJ h@+phy_rxphy_txpll_ctrlasysclkrefclkmsata@4a141100snps,dwc-ahciJJ }6; @sata-physatadss@58000000 ti,omap5-dssX!ok dss_corefckdispc@58001000ti,omap5-dispcX } dss_dispcfckencoder@58002000ti,omap5-rfbiX  !disabled dss_rfbi!fckickencoder@58004000 ti,omap5-dsiX@XB@XC@+protophypll }5 !disabled dss_dsi1 fcksys_clkencoder@58005000 ti,omap5-dsiXX@X@+protophypll }7 !disabled dss_dsi2 fcksys_clkencoder@58060000ti,omap5-hdmi XXXX+wppllphycore }e!ok dss_hdmi fcksys_clksL audio_txdefault portendpointregulator-abb-mpu ti,abb-v22abb_mpu2 J|J`J!J3+base-addressint-addressefuse-addressldo-address0&,regulator-abb-mm ti,abb-v22abb_mm2 J|J`J!J3+base-addressint-addressefuse-addressldo-address0&fixedregulator-mmcsdregulator-fixed 2vmmcsd_fixedA-Y-}}hsusb2_phyusb-nop-xceiv 2f main_clk~$hsusb3_phyusb-nop-xceiv 2leds gpio-ledsled@1>omap5:blue:usr1 8n DheartbeatZoffencoder@0 ti,tpd12s015default $8portsport@0endpoint@0port@1endpoint@0connector@0hdmi-connector>hdmibportendpointsoundti,abe-twl6040 homap5-uevmq$~Headset StereophoneHSOLHeadset StereophoneHSORLine OutAUXLLine OutAUXRHSMICHeadset MicHeadset MicHeadset Mic BiasAFMLLine InAFMRLine In #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5display0device_typeregoperating-pointsclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplylinux,phandlepolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellsti,hwmodssramrangespinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,index-power-of-twoti,dividersti,set-rate-parent#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpmc,num-csgpmc,num-waitpinsti,system-power-controllerti,enable-vbus-detectionti,enable-id-detectionti,wakeupinterrupt-nameti,ldo6-vibratorregulator-always-onregulator-boot-onti,smps-rangestatuswakeup-sourceti,audpwron-gpiovio-supplyv2v1-supplyenable-active-high#hwlock-cellsti,spi-num-csdmasdma-namesinterrupts-extendedti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removable#iommu-cellsti,iommu-bus-err-backreg-namesinterrupt-namesti,buffer-size#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmti,no-idle-on-initphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertutmi-modeextconvbus-supplyphysphy-namesdr_modetx-fifo-resizectrl-module#phy-cellsport2-modeport3-mode#thermal-sensor-cellsvdda-supplyremote-endpointti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_inforeset-gpioslabellinux,default-triggerdefault-stateti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routing