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ti,mux-clock-8timer3_gfclk_mux ti,mux-clock-@timer4_gfclk_mux ti,mux-clock-Htimer9_gfclk_mux ti,mux-clock-Pclockdomainsl3init_clkdmti,clockdomain6l4@4ae00000ti,omap5-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,omap5-prm`0  clockssys_clkin ti,mux-clockKLMNOPQ"(abe_dpll_bypass_clk_mux ti,mux-clock-"(abe_dpll_clk_mux ti,mux-clock- "(custefuse_sys_gfclk_divfixed-factor-clockdss_syc_gfclk_divfixed-factor-clock"%(%wkupaon_iclk_mux ti,mux-clockR"S(Sl3instr_ts_gclk_divfixed-factor-clockSgpio1_dbclkti,gate-clock-8timer1_gfclk_mux ti,mux-clock-@clockdomainsscrm@a000ti,omap5-scrm clocksauxclk0_src_gate_ck ti,composite-no-wait-gate-clockT"V(Vauxclk0_src_mux_ckti,composite-mux-clock TU"W(Wauxclk0_src_ckti,composite-clockVW"X(Xauxclk0_ckti,divider-clockX"e(eauxclk1_src_gate_ck ti,composite-no-wait-gate-clockT"Y(Yauxclk1_src_mux_ckti,composite-mux-clock TU"Z(Zauxclk1_src_ckti,composite-clockYZ"[([auxclk1_ckti,divider-clock["f(fauxclk2_src_gate_ck ti,composite-no-wait-gate-clockT"\(\auxclk2_src_mux_ckti,composite-mux-clock TU"](]auxclk2_src_ckti,composite-clock\]"^(^auxclk2_ckti,divider-clock^"g(gauxclk3_src_gate_ck ti,composite-no-wait-gate-clockT"_(_auxclk3_src_mux_ckti,composite-mux-clock TU"`(`auxclk3_src_ckti,composite-clock_`"a(aauxclk3_ckti,divider-clocka"h(hauxclk4_src_gate_ck ti,composite-no-wait-gate-clockT "b(bauxclk4_src_mux_ckti,composite-mux-clock TU "c(cauxclk4_src_ckti,composite-clockbc"d(dauxclk4_ckti,divider-clockd "i(iauxclkreq0_ck ti,mux-clockefghiauxclkreq1_ck ti,mux-clockefghiauxclkreq2_ck ti,mux-clockefghiauxclkreq3_ck ti,mux-clockefghiclockdomainspinmux@c840 ti,omap5-padconfpinctrl-single@8pinmux_ads7846_pins)"p(pocmcram@40300000 mmio-sram@0"(dma-controller@4a056000ti,omap4430-sdmaJ`0  $ 1"j(jgpio@4ae10000ti,omap4-gpioJ gpio1>P`"r(rgpio@48055000ti,omap4-gpioHP gpio2P`gpio@48057000ti,omap4-gpioHp gpio3P`"(gpio@48059000ti,omap4-gpioH  gpio4P`"(gpio@4805b000ti,omap4-gpioH !gpio5P`gpio@4805d000ti,omap4-gpioH "gpio6P`gpio@48051000ti,omap4-gpioH #gpio7P`"(gpio@48053000ti,omap4-gpioH0 ygpio8P`"w(wgpmc@50000000ti,omap4430-gpmcP ljqrxtx{gpmc!fcki2c@48070000 ti,omap4-i2cH 8i2c1defaultkat24@50 at24,24c02Ppalmas@48 ti,palmas H"l(lpalmas_usbti,palmas-usb-vid"}(}rtcti,palmas-rtc&lpalmas_pmicti,palmas-pmic&l short-irqregulatorssmps123Dsmps123S 'k`+"(smps45Dsmps45S 'k0+smps6Dsmps6S`k`+smps7Dsmps7Sw@kw@+smps8Dsmps8S 'k0+smps9Dsmps9S2Zk2Z=+smps10_out2 Dsmps10_out2SLK@kLK@+smps10_out1 Dsmps10_out1SLK@kLK@"~(~ldo1Dldo1S`kw@ldo2Dldo2S2Zk2ZK"(ldo3Dldo3S`k`+ldo4Dldo4S`kw@"(ldo5Dldo5Sw@kw@+ldo6Dldo6SOkO+ldo7Dldo7Sk \disabledldo8Dldo8S-k-+ldo9Dldo9Sw@k-+"v(vldolnDldolnSw@kw@+ldousbDldousbS1Pk1P+regen3Dregen3+i2c@48072000 ti,omap4-i2cH  9i2c2defaultm"(i2c@48060000 ti,omap4-i2cH =i2c3i2c@4807a000 ti,omap4-i2cH >i2c4defaultnat24@50 at24,24c02Pi2c@4807c000 ti,omap4-i2cH <i2c5spinlock@4a0f6000ti,omap4-hwspinlockJ` spinlockcspi@48098000ti,omap4-mcspiH  Amcspi1q@lj#j$j%j&j'j(j)j* qtx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap4-mcspiH  Bmcspi2q lj+j,j-j.qtx0rx0tx1rx1defaultoads7846@0defaultp ti,ads7846q`&r r  spi@480b8000ti,omap4-mcspiH  [mcspi3qljjqtx0rx0spi@480ba000ti,omap4-mcspiH  0mcspi4qljFjGqtx0rx0serial@4806a000ti,omap4-uartH Huart1lserial@4806c000ti,omap4-uartH Iuart2lserial@48020000ti,omap4-uartH Juart3lserial@4806e000ti,omap4-uartH Fuart4lserial@48066000ti,omap4-uartH` iuart5lserial@48068000ti,omap4-uartH juart6lmmc@4809c000ti,omap4-hsmmcH  Smmc1+8lj=j>qtxrxOsdefaulttu\vhr~ w wmmc@480b4000ti,omap4-hsmmcH @ Vmmc28lj/j0qtxrxdefaultx\yhmmc@480ad000ti,omap4-hsmmcH  ^mmc38ljMjNqtxrxdefaultz{\|hmmc@480d1000ti,omap4-hsmmcH  `mmc48lj9j:qtxrx \disabledmmc@480d5000ti,omap4-hsmmcH P ;mmc58lj;j<qtxrx \disabledmmu@4a066000ti,omap4-iommuJ` mmu_dspmmu@55082000ti,omap4-iommuU  dmmu_ipukeypad@4ae1c000ti,omap4-keypadJkbdmcpdm@40132000ti,omap4-mcpdm@ I mpudma pmcpdmljAjBqup_linkdn_link \disableddmic@4012e000ti,omap4-dmic@Impudma rdmicljCqup_link \disabledmcbsp@40122000ti,omap4-mcbsp@ I mpudma commonmcbsp1lj!j"qtxrx \disabledmcbsp@40124000ti,omap4-mcbsp@@I@mpudma commonmcbsp2ljjqtxrx \disabledmcbsp@40126000ti,omap4-mcbsp@`I`mpudma commonmcbsp3ljjqtxrx \disabledmailbox@4a0f4000ti,omap4-mailboxJ@ mailboxmbox_ipu ) 4mbox_dsp ) 4timer@4ae18000ti,omap5430-timerJ %timer1?timer@48032000ti,omap5430-timerH  &timer2timer@48034000ti,omap5430-timerH@ 'timer3timer@48036000ti,omap5430-timerH` (timer4timer@40138000ti,omap5430-timer@I )timer5N[timer@4013a000ti,omap5430-timer@I *timer6N[timer@4013c000ti,omap5430-timer@I +timer7Ntimer@4013e000ti,omap5430-timer@I ,timer8N[timer@4803e000ti,omap5430-timerH -timer9[timer@48086000ti,omap5430-timerH` .timer10[timer@48088000ti,omap5430-timerH /timer11[wdt@4ae14000ti,omap5-wdtti,omap3-wdtJ@ P wd_timer2dmm@4e000000 ti,omap5-dmmN qdmmemif@4c000000 ti,emif-4d5emif1h{L nemif@4d000000 ti,emif-4d5emif2h{M ocontrol-phy@4a002300ti,control-phy-usb2J#power"(control-phy@4a002370ti,control-phy-pipe3J#ppower"(omap_dwc3@4a020000ti,dwc3 usb_otg_ssJ ]}~dwc3@4a030000 snps,dwc3J$\\]peripheralhostotgusb2-phyusb3-phy peripheralocp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1usb2phy@4a084000 ti,omap-usb2J@|wkupclkrefclk"(usb3phy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrl wkupclksysclkrefclk"(usbhstll@4a062000 ti,usbhs-tllJ  N usb_tll_hsusbhshost@4a064000ti,usbhs-hostJ@ usb_host_hs @AC3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-hsic (ehci-hsicohci@4a064800ti,ohci-omap3JH Lehci@4a064c00 ti,ehci-omapJL M bandgap@4a0021e0 J! J#, J#,J#< ~ti,omap5430-bandgap3"(control-phy@4a002374ti,control-phy-pipe3J#tpowersysclk"(ocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4a096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrlsysclkrefclk"(sata@4a141100snps,dwc-ahciJJ 6 sata-physatadss@58000000 ti,omap5-dssX\ok dss_corefckdefaultdispc@58001000ti,omap5-dispcX  dss_dispcfckencoder@58002000ti,omap5-rfbiX  \disabled dss_rfbi!fckickencoder@58004000 ti,omap5-dsiX@XB@XC@protophypll 5 \disabled dss_dsi1 fcksys_clkencoder@58005000 ti,omap5-dsiXX@X@protophypll 7\ok dss_dsi2 fcksys_clkIencoder@58060000ti,omap5-hdmi XXXXwppllphycore e\ok dss_hdmi fcksys_clkljL qaudio_txTdefaultportendpoint` p"(portendpoint@0`v"(endpoint@1`v"(regulator-abb-mpu ti,abb-v2Dabb_mpu2 J|J`J!J3base-addressint-addressefuse-addressldo-address0,regulator-abb-mm ti,abb-v2Dabb_mm2 J|J`J!J3base-addressint-addressefuse-addressldo-address0fixed-regulator-mmcsdregulator-fixed Dvmmcsd_fixedS2Zk2Z"y(yfixed-regulator-vwlan-pdnregulator-fixedDvwlan_pdn_fixedS2Zk2Z  K"(fixed-regulator-vwlanregulator-fixed Dvwlan_fixedS2Zk2Z K"|(|ads7846-regregulator-fixed Dads7846-regS2Zk2Z"q(qhsusb2_phyusb-nop-xceiv  "(hsusb3_phyusb-nop-xceiv "(leds gpio-ledsled@1 Heartbeat  #heartbeat9offdisplay!startek,startek-kd050cpanel-dpilcddefault Gwpanel-timing@T \d(q(}+ portendpoint`"(connector@0hdmi-connectorhdmiadefault portendpoint`"(encoder@0 ti,tfp410portsport@0endpoint@0`"(port@1endpoint@0`"(connector@1dvi-connectordviportendpoint`"( #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5display0display1display2device_typeregoperating-pointsclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplylinux,phandlepolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellsti,hwmodssramrangespinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,index-power-of-twoti,dividersti,set-rate-parent#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsdmasdma-namesgpmc,num-csgpmc,num-waitpinspagesizeti,system-power-controllerti,enable-vbus-detectionti,enable-id-detectionti,wakeupinterrupt-nameti,ldo6-vibratorregulator-always-onregulator-boot-onti,smps-rangestartup-delay-usstatus#hwlock-cellsti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-invertedwp-invertedcd-gpioswp-gpiosti,non-removable#iommu-cellsti,iommu-bus-err-backreg-namesinterrupt-namesti,buffer-size#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmti,no-idle-on-initphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertutmi-modeextconvbus-supplyphysphy-namesdr_modetx-fifo-resizectrl-module#phy-cellsport2-modeport3-mode#thermal-sensor-cellsvdd-supplyvdda-supplyremote-endpointlanesdata-linesti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infovin-supplyenable-active-highreset-gpioslabellinux,default-triggerdefault-stateenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpiosdigitalddc-i2c-bus