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#address-cells#size-cellscompatibleinterrupt-parentmodelserial0serial1serial2i2c0i2c1device_typereginterruptsti,hwmodsrangesdmasdma-namesinterrupt-controller#interrupt-cellslinux,phandle#dma-cellsdma-channelsdma-requestsclock-frequencyti,timer-dspti,timer-pwmstatus#clock-cellsclocksti,bit-shiftclock-multclock-divti,index-starts-at-oneti,max-divti,idlest-shiftti,clock-frequencyti,index-power-of-twoti,dividersti,clock-divti,autoidle-shiftti,clock-multpinctrl-single,register-widthpinctrl-single,function-maskti,gpio-always-on#gpio-cellsgpio-controllergpmc,num-csgpmc,num-waitpinsgpmc,sync-readgpmc,burst-lengthgpmc,burst-readgpmc,burst-wrapgpmc,device-widthgpmc,mux-add-datagpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,sync-clk-pslabelread-onlyreg-namesinterrupt-names#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwongpios