8(!ti,am3517-evmti,am3517ti,omap3&&7TI AM3517 EVM (AM3517/05 TMDSEVM3517)chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@4809e000memorylmemoryxcpuscpu@0arm,cortex-a8lcpuxpmuarm,cortex-a8-pmuxT|debugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp simple-busxh| l3_mainaes@480c5000 ti,omap3-aesaesxH PP|prm@48306000 ti,omap3-prmxH0`@clocksvirt_16_8m_ck fixed-clockYosc_sys_ck ti,mux-clockx @sys_ckti,divider-clockxp  sys_clkout1ti,gate-clockx pdpll3_x2_ckfixed-factor-clock dpll3_m2x2_ckfixed-factor-clock   dpll4_x2_ckfixed-factor-clock corex2_fckfixed-factor-clock wkup_l4_ickfixed-factor-clock @@corex2_d3_fckfixed-factor-clockaacorex2_d5_fckfixed-factor-clockbbclockdomainscm@48004000 ti,omap3-cmxH@@clocksdummy_apb_pclk fixed-clockomap_32k_fck fixed-clock00virt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ckti,omap3-dpll-per-clock x D 0  dpll4_m2_ckti,divider-clock ?x Hdpll4_m2x2_mul_ckfixed-factor-clockdpll4_m2x2_ckti,gate-clockx omap_96m_alwon_fckfixed-factor-clockdpll3_ckti,omap3-dpll-core-clock x @ 0  dpll3_m3_ckti,divider-clock x@dpll3_m3x2_mul_ckfixed-factor-clockdpll3_m3x2_ckti,gate-clock x emu_core_alwon_ckfixed-factor-clockTTsys_altclk fixed-clockmcbsp_clks fixed-clock77dpll3_m2_ckti,divider-clock x @  core_ckfixed-factor-clock dpll1_fckti,divider-clockx @dpll1_ckti,omap3-dpll-clock x  $ @ 4dpll1_x2_ckfixed-factor-clockdpll1_x2m2_ckti,divider-clockx D,,cm_96m_fckfixed-factor-clockomap_96m_fck ti,mux-clock x @55dpll4_m3_ckti,divider-clock  x@dpll4_m3x2_mul_ckfixed-factor-clockdpll4_m3x2_ckti,gate-clockx omap_54m_fck ti,mux-clockx @((cm_96m_d2_fckfixed-factor-clockomap_48m_fck ti,mux-clockx @  omap_12m_fckfixed-factor-clock 99dpll4_m4_ckti,divider-clock  x@!!dpll4_m4x2_mul_ckfixed-factor-clock!""dpll4_m4x2_ckti,gate-clock"x ffdpll4_m5_ckti,divider-clock ?x@##dpll4_m5x2_mul_ckfixed-factor-clock#$$dpll4_m5x2_ckti,gate-clock$x dpll4_m6_ckti,divider-clock ?x@%%dpll4_m6x2_mul_ckfixed-factor-clock%&&dpll4_m6x2_ckti,gate-clock&x ''emu_per_alwon_ckfixed-factor-clock'UUclkout2_src_gate_ck ti,composite-no-wait-gate-clockx p))clkout2_src_mux_ckti,composite-mux-clock (x p**clkout2_src_ckti,composite-clock)*++sys_clkout2ti,divider-clock+@x p$mpu_ckfixed-factor-clock,--arm_fckti,divider-clock-x $emu_mpu_alwon_ckfixed-factor-clock-VVl3_ickti,divider-clockx @..l4_ickti,divider-clock.x @//rm_ickti,divider-clock/x @gpt10_gate_fckti,composite-gate-clock  x 11gpt10_mux_fckti,composite-mux-clock0 x @22gpt10_fckti,composite-clock12gpt11_gate_fckti,composite-gate-clock  x 33gpt11_mux_fckti,composite-mux-clock0 x @44gpt11_fckti,composite-clock34core_96m_fckfixed-factor-clock566mmchs2_fckti,wait-gate-clock6x mmchs1_fckti,wait-gate-clock6x i2c3_fckti,wait-gate-clock6x i2c2_fckti,wait-gate-clock6x i2c1_fckti,wait-gate-clock6x mcbsp5_gate_fckti,composite-gate-clock7 x mcbsp1_gate_fckti,composite-gate-clock7 x core_48m_fckfixed-factor-clock 88mcspi4_fckti,wait-gate-clock8x mcspi3_fckti,wait-gate-clock8x mcspi2_fckti,wait-gate-clock8x mcspi1_fckti,wait-gate-clock8x uart2_fckti,wait-gate-clock8x uart1_fckti,wait-gate-clock8x  core_12m_fckfixed-factor-clock9::hdq_fckti,wait-gate-clock:x core_l3_ickfixed-factor-clock.;;sdrc_ickti,wait-gate-clock;x gggpmc_fckfixed-factor-clock;core_l4_ickfixed-factor-clock/<<mmchs2_ickti,omap3-interface-clock<x mmchs1_ickti,omap3-interface-clock<x hdq_ickti,omap3-interface-clock<x mcspi4_ickti,omap3-interface-clock<x mcspi3_ickti,omap3-interface-clock<x mcspi2_ickti,omap3-interface-clock<x mcspi1_ickti,omap3-interface-clock<x i2c3_ickti,omap3-interface-clock<x i2c2_ickti,omap3-interface-clock<x i2c1_ickti,omap3-interface-clock<x uart2_ickti,omap3-interface-clock<x uart1_ickti,omap3-interface-clock<x  gpt11_ickti,omap3-interface-clock<x  gpt10_ickti,omap3-interface-clock<x  mcbsp5_ickti,omap3-interface-clock<x  mcbsp1_ickti,omap3-interface-clock<x  omapctrl_ickti,omap3-interface-clock<x dss_tv_fckti,gate-clock(xdss_96m_fckti,gate-clock5xdss2_alwon_fckti,gate-clock xdummy_ck fixed-clockgpt1_gate_fckti,composite-gate-clock x ==gpt1_mux_fckti,composite-mux-clock0 x @>>gpt1_fckti,composite-clock=>aes2_ickti,omap3-interface-clock<x wkup_32k_fckfixed-factor-clock0??gpio1_dbckti,gate-clock?x sha12_ickti,omap3-interface-clock<x wdt2_fckti,wait-gate-clock?x wdt2_ickti,omap3-interface-clock@x wdt1_ickti,omap3-interface-clock@x gpio1_ickti,omap3-interface-clock@x omap_32ksync_ickti,omap3-interface-clock@x gpt12_ickti,omap3-interface-clock@x gpt1_ickti,omap3-interface-clock@x per_96m_fckfixed-factor-clockper_48m_fckfixed-factor-clock AAuart3_fckti,wait-gate-clockAx nngpt2_gate_fckti,composite-gate-clock xBBgpt2_mux_fckti,composite-mux-clock0 x@CCgpt2_fckti,composite-clockBCgpt3_gate_fckti,composite-gate-clock xDDgpt3_mux_fckti,composite-mux-clock0 x@EEgpt3_fckti,composite-clockDEgpt4_gate_fckti,composite-gate-clock xFFgpt4_mux_fckti,composite-mux-clock0 x@GGgpt4_fckti,composite-clockFGgpt5_gate_fckti,composite-gate-clock xHHgpt5_mux_fckti,composite-mux-clock0 x@IIgpt5_fckti,composite-clockHIgpt6_gate_fckti,composite-gate-clock xJJgpt6_mux_fckti,composite-mux-clock0 x@KKgpt6_fckti,composite-clockJKgpt7_gate_fckti,composite-gate-clock xLLgpt7_mux_fckti,composite-mux-clock0 x@MMgpt7_fckti,composite-clockLMgpt8_gate_fckti,composite-gate-clock  xNNgpt8_mux_fckti,composite-mux-clock0 x@OOgpt8_fckti,composite-clockNOgpt9_gate_fckti,composite-gate-clock  xPPgpt9_mux_fckti,composite-mux-clock0 x@QQgpt9_fckti,composite-clockPQper_32k_alwon_fckfixed-factor-clock0RRgpio6_dbckti,gate-clockRxoogpio5_dbckti,gate-clockRxppgpio4_dbckti,gate-clockRxqqgpio3_dbckti,gate-clockRxrrgpio2_dbckti,gate-clockRx sswdt3_fckti,wait-gate-clockRx ttper_l4_ickfixed-factor-clock/SSgpio6_ickti,omap3-interface-clockSxuugpio5_ickti,omap3-interface-clockSxvvgpio4_ickti,omap3-interface-clockSxwwgpio3_ickti,omap3-interface-clockSxxxgpio2_ickti,omap3-interface-clockSx yywdt3_ickti,omap3-interface-clockSx zzuart3_ickti,omap3-interface-clockSx {{uart4_ickti,omap3-interface-clockSx||gpt9_ickti,omap3-interface-clockSx }}gpt8_ickti,omap3-interface-clockSx ~~gpt7_ickti,omap3-interface-clockSxgpt6_ickti,omap3-interface-clockSxgpt5_ickti,omap3-interface-clockSxgpt4_ickti,omap3-interface-clockSxgpt3_ickti,omap3-interface-clockSxgpt2_ickti,omap3-interface-clockSxmcbsp2_ickti,omap3-interface-clockSxmcbsp3_ickti,omap3-interface-clockSxmcbsp4_ickti,omap3-interface-clockSxmcbsp2_gate_fckti,composite-gate-clock7xmcbsp3_gate_fckti,composite-gate-clock7xmcbsp4_gate_fckti,composite-gate-clock7xemu_src_mux_ck ti,mux-clock TUVx@WWemu_src_ckti,clkdm-gate-clockWXXpclk_fckti,divider-clockXx@pclkx2_fckti,divider-clockXx@atclk_fckti,divider-clockXx@traceclk_src_fck ti,mux-clock TUVx@YYtraceclk_fckti,divider-clockY x@secure_32k_fck fixed-clockZZgpt12_fckfixed-factor-clockZwdt1_fckfixed-factor-clockZipss_ickti,am35xx-interface-clock;x hhrmii_ck fixed-clockpclk_ck fixed-clockuart4_ick_am35xxti,omap3-interface-clock<x uart4_fck_am35xxti,wait-gate-clock8x dpll5_ckti,omap3-dpll-clock x  $ L 4:L[[dpll5_m2_ckti,divider-clock[x Peesgx_gate_fckti,composite-gate-clockx cccore_d3_ckfixed-factor-clock\\core_d4_ckfixed-factor-clock]]core_d6_ckfixed-factor-clock^^omap_192m_alwon_fckfixed-factor-clock__core_d2_ckfixed-factor-clock``sgx_mux_fckti,composite-mux-clock \]^_`abx @ddsgx_fckti,composite-clockcdsgx_ickti,wait-gate-clock.x cpefuse_fckti,gate-clock x ts_fckti,gate-clock0x usbtll_fckti,wait-gate-clockex usbtll_ickti,omap3-interface-clock<x mmchs3_ickti,omap3-interface-clock<x mmchs3_fckti,wait-gate-clock6x dss1_alwon_fck_3430es2ti,dss-gate-clockfxTdss_ick_3430es2ti,omap3-dss-interface-clock/xusbhost_120m_fckti,gate-clockexusbhost_48m_fckti,dss-gate-clock xusbhost_ickti,omap3-dss-interface-clock/xclockdomainscore_l3_clkdmti,clockdomainghijklmdpll3_clkdmti,clockdomain dpll1_clkdmti,clockdomainper_clkdmti,clockdomainhnopqrstuvwxyz{|}~emu_clkdmti,clockdomainXdpll4_clkdmti,clockdomain wkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomain[sgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain scrm@48002000ti,omap3-scrmxH clocksmcbsp5_mux_fckti,composite-mux-clock67xmcbsp5_fckti,composite-clockmcbsp1_mux_fckti,composite-mux-clock67xtmcbsp1_fckti,composite-clockmcbsp2_mux_fckti,composite-mux-clock7xtmcbsp2_fckti,composite-clockmcbsp3_mux_fckti,composite-mux-clock7xmcbsp3_fckti,composite-clockmcbsp4_mux_fckti,composite-mux-clock7xmcbsp4_fckti,composite-clockemac_ickti,am35xx-gate-clockhxiiemac_fckti,gate-clockx vpfe_ickti,am35xx-gate-clockhxjjvpfe_fckti,gate-clockx hsotgusb_ick_am35xxti,am35xx-gate-clockhxkkhsotgusb_fck_am35xxti,gate-clock xllhecc_ckti,am35xx-gate-clock xmmclockdomainscounter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap2-intcg|`xH dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH`|  `pinmux@48002030 ti,omap3-padconfpinctrl-singlexH 08|gpinmux@48002a00 ti,omap3-padconfpinctrl-singlexH*\|ggpio@48310000ti,omap3-gpioxH1|gpio1g|gpio@49050000ti,omap3-gpioxI|gpio2g|gpio@49052000ti,omap3-gpioxI |gpio3g|gpio@49054000ti,omap3-gpioxI@| gpio4g|gpio@49056000ti,omap3-gpioxI`|!gpio5g|gpio@49058000ti,omap3-gpioxI|"gpio6g|serial@4806a000ti,omap3-uartxH |H*12/txrxuart1lserial@4806c000ti,omap3-uartxH|I*34/txrxuart2lserial@49020000ti,omap3-uartxI|J*56/txrxuart3li2c@48070000 ti,omap3-i2cxH|8*/txrxi2c1i2c@48072000 ti,omap3-i2cxH |9*/txrxi2c2i2c@48060000 ti,omap3-i2cxH|=*/txrxi2c3mailbox@48094000ti,omap3-mailboxmailboxxH @|spi@48098000ti,omap2-mcspixH |Amcspi19@*#$%&'()* /tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH |Bmcspi29 *+,-./tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH |[mcspi39 */tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH |0mcspi49*FG/tx0rx01w@480b2000 ti,omap3-1wxH |:hdq1wmmc@4809c000ti,omap3-hsmmcxH |Smmc1G*=>/txrxT`mmc@480b4000ti,omap3-hsmmcxH @|Vmmc2*/0/txrx jdisabledmmc@480ad000ti,omap3-hsmmcxH |^mmc3*MN/txrx jdisabledmmu@480bd400ti,omap3-mmu-ispmmu_ispxH |wdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@qmpu |;< {commontxrxmcbsp1* /txrxmcbsp@49022000ti,omap3-mcbspxI I qmpusidetone|>?{commontxrxsidetonemcbsp2mcbsp2_sidetone*!"/txrxmcbsp@49024000ti,omap3-mcbspxI@I qmpusidetone|YZ{commontxrxsidetonemcbsp3mcbsp3_sidetone*/txrxmcbsp@49026000ti,omap3-mcbspxI`qmpu |67 {commontxrxmcbsp4*/txrxmcbsp@48096000ti,omap3-mcbspxH `qmpu |QR {commontxrxmcbsp5*/txrxsham@480c3000ti,omap3-shamshamxH 0d|1smartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH |smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH |timer@48318000ti,omap3430-timerxH1|%timer1timer@49032000ti,omap3430-timerxI |&timer2timer@49034000ti,omap3430-timerxI@|'timer3timer@49036000ti,omap3430-timerxI`|(timer4timer@49038000ti,omap3430-timerxI|)timer5timer@4903a000ti,omap3430-timerxI|*timer6timer@4903c000ti,omap3430-timerxI|+timer7timer@4903e000ti,omap3430-timerxI|,timer8timer@49040000ti,omap3430-timerxI|-timer9timer@48086000ti,omap3430-timerxH`|.timer10timer@48088000ti,omap3430-timerxH|/timer11timer@48304000ti,omap3430-timerxH0@|_timer12usbhstll@48062000 ti,usbhs-tllxH |N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hsohci@48064400ti,ohci-omap3usb-ohcixHD&|Lehci@48064800ti,ehci-omapusb-ehcixHH&|Mgpmc@6e000000ti,omap3430-gpmcgpmcxn|usb_otg_hs@480ab000ti,omap3-musbxH |\]{mcdma usb_otg_hs am35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hs jdisabledx\|G{mcethernet@0x5c000000ti,am3517-emac davinci_emacjokayx\|CDEF (Gb {ethernet@0x5c030000ti,davinci_mdio davinci_mdiojokayx\B@serial@4809e000ti,omap3-uartuart4 jdisabledxH |T*76/txrxlvmmcregulator-fixed vmmc_fixed2Z2Z #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typereginterruptsti,hwmodsranges#clock-cellsclock-frequencylinux,phandleclocksti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,index-power-of-twoti,low-power-stopti,lockti,set-rate-parentinterrupt-controller#interrupt-cellsti,intc-size#dma-cells#dma-channels#dma-requestspinctrl-single,register-widthpinctrl-single,function-maskti,gpio-always-ongpio-controller#gpio-cellsdmasdma-namesti,spi-num-csti,dual-voltvmmc-supplybus-widthstatusreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqregulator-nameregulator-min-microvoltregulator-max-microvolt