Ð þípÖ8k(ºjäti,am335x-boneti,am33xx&7TI AM335x BeagleBonechosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/d_can@481cc000ƒ/ocp/d_can@481d0000Š/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#”/ocp/usb@47400000/usb-phy@47401300#™/ocp/usb@47400000/usb-phy@47401b00&ž/ocp/ethernet@4a100000/slave@4a100200&¨/ocp/ethernet@4a100000/slave@4a100300memory²memory¾€cpuscpu@0arm,cortex-a8²cpu¾  ü€›ˆ 'À±(¡ *ˆ28*ˆÓåìcpuø“àpmuarm,cortex-a8-pmusocti,omap-inframpu ti,omap3-mpumpupinmux@44e10800pinctrl-single¾Dá8' Ebdefaultpuser_leds_s0 zTX\`Ž7”7pinmux_i2c0_pinszˆ0Œ0Ž)”)pinmux_uart0_pinszp0tŽ(”(pinmux_clkout2_pinz´Ž”cpsw_defaulthz00 $(,0004080<0@0Ž2”2cpsw_sleephz'''' '$'(','0'4'8'<'@'Ž3”3davinci_mdio_defaultzHpLŽ4”4davinci_mdio_sleepzH'L'Ž5”5pinmux_mmc1_pinsz`/Ž+”+pinmux_emmc_pinsPz€2„2111 11111ocp simple-busœl3_mainprcm@44e00000 ti,am3-prcm¾Dà@clocksclk_32768_ck£ fixed-clock°€Ž”clk_rc32k_ck£ fixed-clock°}Ž”virt_19200000_ck£ fixed-clock°$øŽ!”!virt_24000000_ck£ fixed-clock°n6Ž"”"virt_25000000_ck£ fixed-clock°}x@Ž#”#virt_26000000_ck£ fixed-clock°Œº€Ž$”$tclkin_ck£ fixed-clock°·Ž”dpll_core_ck£ti,am3-dpll-core-clockå ¾\hŽ”dpll_core_x2_ck£ti,am3-dpll-x2-clock厔dpll_core_m4_ck£ti,divider-clockåÀ¾€ËŽ”dpll_core_m5_ck£ti,divider-clockåÀ¾„ËŽ”dpll_core_m6_ck£ti,divider-clockåÀ¾ØËdpll_mpu_ck£ti,am3-dpll-clockå ¾ˆ ,Ž”dpll_mpu_m2_ck£ti,divider-clockåÀ¾¨Ëdpll_ddr_ck£ti,am3-dpll-no-gate-clockå ¾”4@Ž”dpll_ddr_m2_ck£ti,divider-clockåÀ¾ ËŽ ” dpll_ddr_m2_div2_ck£fixed-factor-clockå âídpll_disp_ck£ti,am3-dpll-no-gate-clockå ¾˜HTŽ ” dpll_disp_m2_ck£ti,divider-clockå À¾¤Ë÷Ž”dpll_per_ck£!ti,am3-dpll-no-gate-j-type-clockå ¾ŒpœŽ ” dpll_per_m2_ck£ti,divider-clockå À¾¬ËŽ ” dpll_per_m2_div4_wkupdm_ck£fixed-factor-clockå âídpll_per_m2_div4_ck£fixed-factor-clockå âícefuse_fck£ti,gate-clockå ¾ clk_24mhz£fixed-factor-clockå âíŽ ” clkdiv32k_ck£fixed-factor-clockå âíÜŽ”clkdiv32k_ick£ti,gate-clockå ¾LŽ”l3_gclk£fixed-factor-clockåâ펔pruss_ocp_gclk£ ti,mux-clockå¾0mmu_fck£ti,gate-clockå ¾ timer1_fck£ ti,mux-clockå¾(timer2_fck£ ti,mux-clock å¾timer3_fck£ ti,mux-clock å¾ timer4_fck£ ti,mux-clock å¾timer5_fck£ ti,mux-clock å¾timer6_fck£ ti,mux-clock å¾timer7_fck£ ti,mux-clock å¾usbotg_fck£ti,gate-clockå  ¾|dpll_core_m4_div2_ck£fixed-factor-clockåâ펔ieee5000_fck£ti,gate-clockå ¾äwdt1_fck£ ti,mux-clockå¾8l4_rtc_gclk£fixed-factor-clockåâíl4hs_gclk£fixed-factor-clockåâíl3s_gclk£fixed-factor-clockåâíl4fw_gclk£fixed-factor-clockåâíl4ls_gclk£fixed-factor-clockåâísysclk_div_ck£fixed-factor-clockåâícpsw_125mhz_gclk£fixed-factor-clockåâícpsw_cpts_rft_clk£ ti,mux-clockå¾ gpio0_dbclk_mux_ck£ ti,mux-clock å¾<Ž”gpio0_dbclk£ti,gate-clockå ¾gpio1_dbclk£ti,gate-clockå ¾¬gpio2_dbclk£ti,gate-clockå ¾°gpio3_dbclk£ti,gate-clockå ¾´lcd_gclk£ ti,mux-clock å ¾4÷Ž”mmc_clk£fixed-factor-clockå âígfx_fclk_clksel_ck£ ti,mux-clockå  ¾,Ž”gfx_fck_div_ck£ti,divider-clockå¾,Àsysclkout_pre_ck£ ti,mux-clockå ¾Ž”clkout2_div_ck£ti,divider-clockå À¾Ž ” dbg_sysclk_ck£ti,gate-clockå ¾Ž”dbg_clka_ck£ti,gate-clockå ¾Ž”stm_pmd_clock_mux_ck£ ti,mux-clockå ¾Ž”trace_pmd_clk_mux_ck£ ti,mux-clockå ¾Ž”stm_clk_div_ck£ti,divider-clockå À@¾trace_clk_div_ck£ti,divider-clockå À@¾clkout2_ck£ti,gate-clockå  ¾clockdomainsclk_24mhz_clkdmti,clockdomainåscrm@44e10000 ti,am3-scrm¾Dá clockssys_clkin_ck£ ti,mux-clockå!"#$ ¾@Ž”adc_tsc_fck£fixed-factor-clockåâídcan0_fck£fixed-factor-clockåâídcan1_fck£fixed-factor-clockåâímcasp0_fck£fixed-factor-clockåâímcasp1_fck£fixed-factor-clockåâísmartreflex0_fck£fixed-factor-clockåâísmartreflex1_fck£fixed-factor-clockåâísha0_fck£fixed-factor-clockåâíaes0_fck£fixed-factor-clockåâírng_fck£fixed-factor-clockåâíehrpwm0_gate_tbclk£ ti,composite-no-wait-gate-clockå  ¾dŽ%”%ehrpwm0_tbclk£ti,composite-clockå%ehrpwm1_gate_tbclk£ ti,composite-no-wait-gate-clockå  ¾dŽ&”&ehrpwm1_tbclk£ti,composite-clockå&ehrpwm2_gate_tbclk£ ti,composite-no-wait-gate-clockå  ¾dŽ'”'ehrpwm2_tbclk£ti,composite-clockå'clockdomainsinterrupt-controller@48200000ti,omap2-intc-BS€¾H Ž”edma@49000000 ti,edma3tpcctptc0tptc1tptc2¾IDá  `k@xˆŽ*”*gpio@44e07000ti,omap4-gpiogpio1–¦-B¾Dàp`Ž,”,gpio@4804c000ti,omap4-gpiogpio2–¦-B¾HÀbŽ8”8gpio@481ac000ti,omap4-gpiogpio3–¦-B¾HÀ gpio@481ae000ti,omap4-gpiogpio4–¦-B¾Hà>serial@44e09000ti,omap3-uartuart1°Ül¾Dà H²okaybdefaultp(serial@48022000ti,omap3-uartuart2°Ül¾H I ²disabledserial@48024000ti,omap3-uartuart3°Ül¾H@ J ²disabledserial@481a6000ti,omap3-uartuart4°Ül¾H` , ²disabledserial@481a8000ti,omap3-uartuart5°Ül¾H€ - ²disabledserial@481aa000ti,omap3-uartuart6°Ül¾H  . ²disabledi2c@44e0b000 ti,omap4-i2ci2c1¾Dà°F²okaybdefaultp)°€tps@24¾$ ti,tps65217regulatorsregulator@0¾¹dcdc1Îregulator@1¾¹dcdc2âvdd_mpuñH 7È!ÎŽ”regulator@2¾¹dcdc3 âvdd_coreñH Œ0!Îregulator@3¾¹ldo1Îregulator@4¾¹ldo2Îregulator@5¾¹ldo3Îñw@ 2Z Ž-”-regulator@6¾¹ldo4Îi2c@4802a000 ti,omap4-i2ci2c2¾H G ²disabledi2c@4819c000 ti,omap4-i2ci2c3¾HÀ ²disabledmmc@48060000ti,omap4-hsmmcmmc13@Wt**ytxrx@&¾H²okayƒbdefaultp+ ,–¢-mmc@481d8000ti,omap4-hsmmcmmc2@t**ytxrx&¾H€ ²disabledmmc@47810000ti,omap4-hsmmcmmc3@&¾G ²disabledspinlock@480ca000ti,omap4-hwspinlock¾H   spinlock®wdt@44e35000 ti,omap3-wdt wd_timer2¾DãP[d_can@481cc000 bosch,d_cand_can0¾HÀ DáD4 ²disabledd_can@481d0000 bosch,d_cand_can1¾H DáD7 ²disabledtimer@44e31000ti,am335x-timer-1ms¾DãCtimer1¼timer@48040000ti,am335x-timer¾HDtimer2timer@48042000ti,am335x-timer¾H Etimer3timer@48044000ti,am335x-timer¾H@\timer4Ëtimer@48046000ti,am335x-timer¾H`]timer5Ëtimer@48048000ti,am335x-timer¾H€^timer6Ëtimer@4804a000ti,am335x-timer¾H _timer7Ërtc@44e3e000 ti,da830-rtc¾DãàKLrtcspi@48030000ti,omap4-mcspi¾HAØspi0 t****ytx0rx0tx1rx1 ²disabledspi@481a0000ti,omap4-mcspi¾H}Øspi1 t***+*,*-ytx0rx0tx1rx1 ²disabledusb@47400000ti,am33xx-usb¾G@œ usb_otg_hs²okaycontrol@44e10620ti,am335x-usb-ctrl-module¾Dá DáHæphy_ctrlwakeup ²disabledŽ.”.usb-phy@47401300ti,am335x-usb-phy¾G@æphy²okayð.Ž/”/usb@47401000ti,musb-am33xx²okay¾G@G@ æmccontrolümc otg&5 EôR/ht0000000000 0 0 0 0 00000000000 0 0 0 0 0„yrx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15usb-phy@47401b00ti,am335x-usb-phy¾G@æphy²okayð.Ž1”1usb@47401800ti,musb-am33xx²okay¾G@G@ æmccontrolümc host&5 EôR1ht000000000000000000000000000000„yrx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15dma-controller@47402000ti,am3359-cppi41 ¾G@G@ G@0G@@@#ægluecontrollerschedulerqueuemgrüglue`We ²disabledŽ0”0control@44e10000²okaydma-controller@07402000²okayepwmss@48300000ti,am33xx-pwmss¾H0epwmss0 ²disabled$œH0H0€H0€H0€€H0H0€ecap@48300100ti,am33xx-ecaps¾H0€üecap0ecap0 ²disabledehrpwm@48300200ti,am33xx-ehrpwms¾H0€ehrpwm0 ²disabledepwmss@48302000ti,am33xx-pwmss¾H0 epwmss1 ²disabled$œH0!H0!€H0!€H0!€€H0"H0"€ecap@48302100ti,am33xx-ecaps¾H0!€/üecap1ecap1 ²disabledehrpwm@48302200ti,am33xx-ehrpwms¾H0"€ehrpwm1 ²disabledepwmss@48304000ti,am33xx-pwmss¾H0@epwmss2 ²disabled$œH0AH0A€H0A€H0A€€H0BH0B€ecap@48304100ti,am33xx-ecaps¾H0A€=üecap2ecap2 ²disabledehrpwm@48304200ti,am33xx-ehrpwms¾H0B€ehrpwm2 ²disabledethernet@4a100000ti,cpswcpgmac0~™ ¥¯@¸ ÄËØ€è¾JJ&()*+œbdefaultsleepp2ù3mdio@4a101000ti,davinci_mdio davinci_mdioB@¾Jbdefaultsleepp4ù5Ž6”6slave@4a100200 6miislave@4a100300 6miicpsw-phy-sel@44e10650ti,am3352-cpsw-phy-sel¾DáP ægmii-selocmcram@40300000ti,am3352-ocmcram¾@0ocmcramwkup_m3@44d00000ti,am3353-wkup-m3¾DÐ@DØ wkup_m3(elm@48080000ti,am3352-elm¾H elm ²disabledlcdc@4830e000ti,am33xx-tilcdc¾H0à&$lcdc ²disabledtscadc@44e0d000ti,am3359-tscadc¾DàÐ&adc_tsc ²disabledtscti,am3359-tscadc<ti,am3359-adcgpmc@50000000ti,am3352-gpmcgpmcN¾P dam ²disabledsham@53100000ti,omap4-shamsham¾Smt*$yrx²okayaes@53500000 ti,omap4-aesaes¾SP gt**ytxrx²okaymcasp@48038000ti,am33xx-mcasp-audiomcasp0¾H€ F@æmpudatPQtxrx ²disabledt** ytxrxmcasp@4803C000ti,am33xx-mcasp-audiomcasp1¾HÀ F@@æmpudatRStxrx ²disabledt* * ytxrxrng@48310000 ti,omap4-rngrng¾H1 oledsbdefaultp7 gpio-ledsled@2beaglebone:green:heartbeat 8 –heartbeat¬offled@3beaglebone:green:mmc0 8–mmc0¬offled@4beaglebone:green:usr2 8–cpu0¬offled@5beaglebone:green:usr3 8–mmc1¬offfixedregulator@0regulator-fixed âvmmcsd_fixedñ2Z  2Z  #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d_can0d_can1usb0usb1phy0phy1ethernet0ethernet1device_typeregoperating-pointsvoltage-toleranceclocksclock-namesclock-latencycpu0-supplyinterruptsti,hwmodspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinslinux,phandleranges#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shiftti,index-power-of-twointerrupt-controller#interrupt-cellsti,intc-size#dma-cellsdma-channelsti,edma-regionsti,edma-slotsgpio-controller#gpio-cellsstatusregulator-compatibleregulator-always-onregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onti,dual-voltti,needs-special-resetti,needs-special-hs-handlingdmasdma-namesbus-widthcd-gpioscd-invertedvmmc-supply#hwlock-cellsti,timer-alwonti,timer-pwmti,spi-num-csreg-namesti,ctrl_modinterrupt-namesdr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftpinctrl-1bus_freqmac-addressphy_idphy-modeti,no-reset-on-init#io-channel-cellsti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsinterrupts-nameslabellinux,default-triggerdefault-state