8(ޤDcompulab,omap3-sbc-t3517compulab,omap3-cm-t3517ti,am3517ti,omap3&!7CompuLab SBC-T3517 with CM-T3517chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@4809e000 l/connector@0 u/connector@1memory~memorycpuscpu@0arm,cortex-a8~cpucpupmuarm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocpti,omap3-l3-smxsimple-bush l3_mainl4@48000000ti,omap3-l4-coresimple-bus Hscm@2000ti,omap3-scmsimple-bus  pinmux@30 ti,omap3-padconfpinctrl-single083defaultApinmux_uart3_pinsKnp_epinmux_mmc1_pins0K_epinmux_green_led_pinsK_epinmux_dss_dpi_pins_commonK_epinmux_dss_dpi_pins_cm_t35x0K_epinmux_ads7846_pinsK_epinmux_mcspi1_pins K_epinmux_i2c1_pinsK_epinmux_mcbsp2_pins K _epinmux_hsusb1_phy_reset_pinsKH_epinmux_hsusb2_phy_reset_pinsKJ_epinmux_otg_drv_vbusK_epinmux_mmc2_pins0K(*,.02_epinmux_wl12xx_core_pinsKF_epinmux_usb_hub_pinsKT_epinmux_smsc2_pinsK_epinmux_tfp410_pinsK_epinmux_i2c3_pinsK_epinmux_sb_t35_audio_ampK_epinmux_mmc1_aux_pinsKD_epinmux_sb_t35_usb_hub_pinsK_escm_conf@270sysconp0_eclocksmcbsp5_mux_fckmti,composite-mux-clockzh_emcbsp5_fckmti,composite-clockmcbsp1_mux_fckmti,composite-mux-clockz_ e mcbsp1_fckmti,composite-clock mcbsp2_mux_fckmti,composite-mux-clock z_ e mcbsp2_fckmti,composite-clock mcbsp3_mux_fckmti,composite-mux-clock h_emcbsp3_fckmti,composite-clockmcbsp4_mux_fckmti,composite-mux-clock zh_emcbsp4_fckmti,composite-clockemac_ickmti,am35xx-gate-clockz_yeyemac_fckmti,gate-clockz vpfe_ickmti,am35xx-gate-clockz_zezvpfe_fckmti,gate-clockz hsotgusb_ick_am35xxmti,am35xx-gate-clockz_{e{hsotgusb_fck_am35xxmti,gate-clockz_|e|hecc_ckmti,am35xx-gate-clockz_}e}clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \pinmux_wl12xx_wkup_pinsK_eaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocksvirt_16_8m_ckm fixed-clockY_eosc_sys_ckm ti,mux-clock @_esys_ckmti,divider-clockzp_esys_clkout1mti,gate-clock pzdpll3_x2_ckmfixed-factor-clockdpll3_m2x2_ckmfixed-factor-clock_!e!dpll4_x2_ckmfixed-factor-clock corex2_fckmfixed-factor-clock!_"e"wkup_l4_ickmfixed-factor-clock_QeQcorex2_d3_fckmfixed-factor-clock"_rercorex2_d5_fckmfixed-factor-clock"_sesclockdomainscm@48004000 ti,omap3-cmH@@clocksdummy_apb_pclkm fixed-clockomap_32k_fckm fixed-clock_CeCvirt_12m_ckm fixed-clock_evirt_13m_ckm fixed-clock]@_evirt_19200000_ckm fixed-clock$_evirt_26000000_ckm fixed-clock_evirt_38_4m_ckm fixed-clockI_edpll4_ckmti,omap3-dpll-per-clock D 0_ e dpll4_m2_ckmti,divider-clock ? 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z_euart2_ickmti,omap3-interface-clockM z_euart1_ickmti,omap3-interface-clockM z _egpt11_ickmti,omap3-interface-clockM z _egpt10_ickmti,omap3-interface-clockM z _emcbsp5_ickmti,omap3-interface-clockM z _emcbsp1_ickmti,omap3-interface-clockM z _eomapctrl_ickmti,omap3-interface-clockM z_edss_tv_fckmti,gate-clock;z_edss_96m_fckmti,gate-clockHz_edss2_alwon_fckmti,gate-clockz_edummy_ckm fixed-clockgpt1_gate_fckmti,composite-gate-clockz _NeNgpt1_mux_fckmti,composite-mux-clockC @_OeOgpt1_fckmti,composite-clockNOaes2_ickmti,omap3-interface-clockMz _ewkup_32k_fckmfixed-factor-clockC_PePgpio1_dbckmti,gate-clockP z_esha12_ickmti,omap3-interface-clockM z_ewdt2_fckmti,wait-gate-clockP z_ewdt2_ickmti,omap3-interface-clockQ z_ewdt1_ickmti,omap3-interface-clockQ z_egpio1_ickmti,omap3-interface-clockQ z_eomap_32ksync_ickmti,omap3-interface-clockQ z_egpt12_ickmti,omap3-interface-clockQ z_egpt1_ickmti,omap3-interface-clockQ z_eper_96m_fckmfixed-factor-clock,_ e per_48m_fckmfixed-factor-clock3_ReRuart3_fckmti,wait-gate-clockRz _~e~gpt2_gate_fckmti,composite-gate-clockz_SeSgpt2_mux_fckmti,composite-mux-clockC@_TeTgpt2_fckmti,composite-clockSTgpt3_gate_fckmti,composite-gate-clockz_UeUgpt3_mux_fckmti,composite-mux-clockCz@_VeVgpt3_fckmti,composite-clockUVgpt4_gate_fckmti,composite-gate-clockz_WeWgpt4_mux_fckmti,composite-mux-clockCz@_XeXgpt4_fckmti,composite-clockWXgpt5_gate_fckmti,composite-gate-clockz_YeYgpt5_mux_fckmti,composite-mux-clockCz@_ZeZgpt5_fckmti,composite-clockYZgpt6_gate_fckmti,composite-gate-clockz_[e[gpt6_mux_fckmti,composite-mux-clockCz@_\e\gpt6_fckmti,composite-clock[\gpt7_gate_fckmti,composite-gate-clockz_]e]gpt7_mux_fckmti,composite-mux-clockCz@_^e^gpt7_fckmti,composite-clock]^gpt8_gate_fckmti,composite-gate-clockz __e_gpt8_mux_fckmti,composite-mux-clockCz@_`e`gpt8_fckmti,composite-clock_`gpt9_gate_fckmti,composite-gate-clockz _aeagpt9_mux_fckmti,composite-mux-clockCz@_bebgpt9_fckmti,composite-clockabper_32k_alwon_fckmfixed-factor-clockC_cecgpio6_dbckmti,gate-clockcz_egpio5_dbckmti,gate-clockcz_egpio4_dbckmti,gate-clockcz_egpio3_dbckmti,gate-clockcz_egpio2_dbckmti,gate-clockcz _ewdt3_fckmti,wait-gate-clockcz _eper_l4_ickmfixed-factor-clockB_dedgpio6_ickmti,omap3-interface-clockdz_egpio5_ickmti,omap3-interface-clockdz_egpio4_ickmti,omap3-interface-clockdz_egpio3_ickmti,omap3-interface-clockdz_egpio2_ickmti,omap3-interface-clockdz _ewdt3_ickmti,omap3-interface-clockdz _euart3_ickmti,omap3-interface-clockdz _euart4_ickmti,omap3-interface-clockdz_egpt9_ickmti,omap3-interface-clockdz _egpt8_ickmti,omap3-interface-clockdz _egpt7_ickmti,omap3-interface-clockdz_egpt6_ickmti,omap3-interface-clockdz_egpt5_ickmti,omap3-interface-clockdz_egpt4_ickmti,omap3-interface-clockdz_egpt3_ickmti,omap3-interface-clockdz_egpt2_ickmti,omap3-interface-clockdz_emcbsp2_ickmti,omap3-interface-clockdz_emcbsp3_ickmti,omap3-interface-clockdz_emcbsp4_ickmti,omap3-interface-clockdz_emcbsp2_gate_fckmti,composite-gate-clockz_ e mcbsp3_gate_fckmti,composite-gate-clockz_emcbsp4_gate_fckmti,composite-gate-clockz_eemu_src_mux_ckm ti,mux-clockefg@_hehemu_src_ckmti,clkdm-gate-clockh_ieipclk_fckmti,divider-clockiz@pclkx2_fckmti,divider-clockiz@atclk_fckmti,divider-clockiz@traceclk_src_fckm ti,mux-clockefgz@_jejtraceclk_fckmti,divider-clockjz @secure_32k_fckm fixed-clock_kekgpt12_fckmfixed-factor-clockkwdt1_fckmfixed-factor-clockkipss_ickmti,am35xx-interface-clockL z_ermii_ckm fixed-clock_epclk_ckm fixed-clock_euart4_ick_am35xxmti,omap3-interface-clockM zuart4_fck_am35xxmti,wait-gate-clockI zdpll5_ckmti,omap3-dpll-clock  $ L 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dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomainlsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH _edma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH` Q\ i`_epbias_regulatorti,pbias-omapvpbias_mmc_omap2430}pbias_mmc_omap2430w@-_egpio@48310000ti,omap3-gpioH1gpio1_egpio@49050000ti,omap3-gpioIgpio2_egpio@49052000ti,omap3-gpioI gpio3_egpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5_egpio@49058000ti,omap3-gpioI"gpio6_eserial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lserial@49020000ti,omap3-uartIJ56txrxuart3l3defaultAi2c@48070000 ti,omap3-i2cH8txrxi2c13defaultAat24@50 at24,24c02Pi2c@48072000 ti,omap3-i2cH 9txrxi2c2i2c@48060000 ti,omap3-i2cH=txrxi2c33defaultAat24@50 at24,24c02Pmailbox@48094000ti,omap3-mailboxmailboxH @% disableddsp 7 Bspi@48098000ti,omap2-mcspiH Amcspi1M@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx33defaultAads7846@03defaultA ti,ads7846[f`& x spi@4809a000ti,omap2-mcspiH Bmcspi2M +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [mcspi3M tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0mcspi4MFGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1=>txrx3defaultA * 6 ?mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx3defaultA*HX fwlcore@2 ti,wl1271&yImmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp disabledmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrx disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxok3defaultAmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrx disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrx disabledsham@480c3000ti,omap3-shamshamH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaH  disabledtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs  ehci-phy ehci-phyohci@48064400ti,ohci-omap3HD&Lehci@48064800 ti,ehci-omapHH&M"gpmc@6e000000ti,omap3430-gpmcgpmcn'3 -nand@0,0 ETfswvxxxxZZ1H@<Zxkx|Zpartition@0xloaderpartition@0x80000ubootpartition@0x260000uboot environment&partition@0x2a0000linux*@partition@0x6a0000rootfsjethernet@4,0smsc,lan9221smsc,lan91153defaultA& Tv(--Zk1xK@K|1AO\usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hsr} dss@48050000 ti,omap3-dssHok dss_corefck3defaultAdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfckportendpoint_eportendpoint_essi-controller@48058000 ti,omap3-ssissi disabledHHsysgddGgdd_mpussi-port@4805a000ti,omap3-ssi-portHHtxrx&CDssi-port@4805b000ti,omap3-ssi-portHHtxrx&EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hsokay\Gmc3defaultAethernet@0x5c000000ti,am3517-emac davinci_emacokay\CDEFv #6ethernet@0x5c030000ti,davinci_mdio davinci_mdiookay\HB@serial@4809e000ti,omap3-uartuart4 disabledH T76txrxlleds gpio-leds3defaultAledb cm-t3x:green 9 Qheartbeathsusb1_power_regregulator-fixed }hsusb1_vbus2Z2Zgp_ehsusb2_power_regregulator-fixed }hsusb2_vbus2Z2Zgp_ehsusb1_phyusb-nop-xceiv[3defaultA x_ehsusb2_phyusb-nop-xceiv[3defaultA x_eads7846-regregulator-fixed }ads7846-reg2Z2Z_econnector@1svideo-connectortvportendpoint_eregulator-vmmcregulator-fixed}vmmc2Z2Z_ewl12xx_vmmc2regulator-fixed}vw12713defaultAw@w@ gN _ewl12xx_vaux2regulator-fixed}vwl1271_vaux2w@w@_eencoder@0 ti,tfp410 3defaultAportsport@0endpoint@0_eport@1endpoint@0_econnector@0dvi-connectordviportendpoint_eaudio_ampregulator-fixed }audio_amp3defaultA regulator-vddvario-sb-t35regulator-fixed }vddvario_eregulator-vdd33a-sb-t35regulator-fixed}vdd33a_e #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinslinux,phandle#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requestssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpagesize#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-replinux,wakeupti,dual-voltpbias-supplybus-widthvmmc-supplywp-gpioscd-gpiosvmmc_aux-supplynon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsremote-endpointti,channelsdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqlinux,default-triggerstartup-delay-usreset-gpiosenable-active-highpowerdown-gpiosenable-active-lowregulator-always-on